Noise modeling in a signal conditioning circuit for low power audio application using resistive sensor

Piezoresistive sensors convert a physical value into a resistance variation. Often four resistive elements are connected together in a Wheatstone bridge to provide electrical variations of sensors. When this structure is biased with a fixed voltage source or a current source the topology provides a differential output voltage. To exploit information a conditioning circuit is associated to the bridge. In most cases it consists of an instrumentation amplifier followed by a data converter to obtain very quickly a digital representation of information. Due to the high input impedance of the instrumentation amplifier, bridge sensitivity is preserved. A filter may be added to avoid aliasing or a continuous time sigma-delta modulator that includes filtering feature. This study is concerning the conditioning structure for piezoresistive sensors bridge especially fully integrated microphones for biomedical application. The bridge signal to noise ratio is set by biasing the amplifier stage by current. The noise performance becomes the limiting factor of the read-out circuit. Current mode topologies drive amplifiers design where inputs are the main noise contributor. Modeling noise contribution is a key point in the design of the conditioning circuit. The current consumption leads noise performances too. A proposed architecture was implemented in a 65nm CMOS standard technology for performance measurement and evaluation with nanowire based microphone dedicated to hearing aids application.


Introduction
The application of a cochlear implant needs to develop amplifiers for conditioning circuits of nano scale M&NEM (Micro & Nano Electro Mechanical) sensors.Those sensors are microphones.The amplifier of the sensor necessarily adds noise to the useful signal.Thereby, the resulting signal to noise ratio SNR is necessarily less than a single sensor.The evaluation of performance in terms of EIN for the entire microphone used to put these performances in the prior art regardless of the nature of the output signal (digital or analog) by comparing sound pressure levels expressed in dB SPL (Signal Pressure Level) common unit at any microphones.These considerations lead to the development of the curve shown in the graph of Fig. 1 for a bias current of 100 A acoustic noise reduced in set entry is indicated as a function of the noise added by the amplifier.This curve can anticipate the performance of the system in terms of acoustic noise at the input according to the noise added by the amplifier.
The equivalent acoustic noise levels of MEMS microphones already marketed are indicated along the ordinate axis [1,2].The performance of CMOS amplifiers described  in the prior art are indicated along the abscissa axis.This shows that it is possible to supplant MEMS microphones with existing amplification circuits [3][4][5].

Conditioning circuit
The detailed study of the operation of the sensor has to highlight the specific constraints bridge itself as the presence of common mode voltage and output impedance.The simplified topology of the conditioning circuit of the sensor is shown in Fig. 2: Biasing involves power consumption.In the simplest case, if the constraints are not so strong the sensor can be directly polarized with the same power as the amplifier.This implies that the equivalent resistance R 0 for the association of four gauges is high enough to maintain reasonable power loss, or that the supply voltage is sufficiently small [5][6][7][8][9].However, current integrated circuits described in the state of the art as well as those sold in the industry in general operate with supply voltages above 1.2V.This supply applied to the sensor described above gives rise to a current I Bias equal to 279uA.This corresponds to a power of 334mW.This power is excessive due to what it can not be dissipated by the nanoscale sensors and it causes an incompatible use with biomedical targeted application.It is therefore essential to have a mastering circuit for the polarization regardless of the supply voltage of the amplifier.The common mode output voltage of the sensor can cause problems to the amplifier when the assembly is referenced to 0V.Indeed, for an I Bias current of 100 A, the bias voltage V Bias is 0.4V.In this case, the common mode voltage V CM is 0.2V.This means the input signals V A and V B of the amplifier operate around a mean value of 0.2V.In order to drive this common mode voltage to a value compatible with the amplifier it is essential to drive independently the current V Bias from the common mode voltage.The difficulty at that time is to determine the correct noise influence of all elements in this system and especially the noise contribution of the instrument amplifier used.

Noise modeling for the instrument amplifier
The overall contribution of the instrumentation amplifier shown is mainly determined by the input stage.The diagram in Fig. 3 shows the noise model of the first order.This model is composed by non-noise amplifiers rated A 1 and A 2 .They are completed by voltages sources at inputs e NA1 + , e NA1 − and e NA2 + , e NA2 − and the current sources i NA1 + , i NA1 − and i NA2 + and i NA2 − .All these sources represent the noise contribution in real circuits.The contribution of resistance is modeled by the voltage sources e NF (1 and 2) and e NG .Assuming that noise sources are not correlated and that the amplifiers A 1 and A 2 are identical, it is possible to represent all the contributions in the form of a single noise source e AI so it reduced the input of an amplifier AI' not noisy.So, the equivalent noise model will compare the impact of different noise sources in the amplification structure.We are not able to sum directly the instantaneous voltages and the instantaneous currents of noise [11][12][13] due to their specific natures (random fluctuation), the influence of each contribution will be determined separately.
The power of the source of the noise source e AI at the input will be determined by considering the sum of the noise power output of the amplifier stage.The noise model is decomposed as shown in Figs.4a-d Figs.4a-d and are expressed in Eqs. ( 1)-( 4) respectively.
The voltages V IPA2 , V INA2 , V EPA2 , V ENA2 sources show the noise contributions at the input in amplifier A 2 .The expressions of the noise sources are obtained by following the same way and it leads to Eqs. ( 5)- (8).
The resistors also make a noise contribution as shown in Figs.5a and b.The voltages V RF1 , V RF2 and V RG illustrate the voltage sources contribution of the noisy resistances in the amplifier.
V RF 2 = e NF 2 (10) After the establishment of the noise sources, it is possible to calculate the total noise power V 2 NOISE as the sum of the powers of each component.When the amplifiers A 1 and A 2 are identical the expressions ( 12) to (16) give the noise power of each contribution.
i-DUST 2016 The noise power V 2 NOISE output of the amplifier is expressed in (17).
This Eq. ( 18) determines the equivalent noise power e 2 AI of this amplification stage.
When the voltage gain is important, ie R F R G , this expression can be approximated and gives in (19).
The noise voltage added by the amplifier is the most significant regarding the other element.Indeed, the resistor R F is a negligible contribution and the resistance R G can be chosen as small as possible for example 100 and this gives noise density of 0.407nV/sqrt(Hz).This rough estimate does not involve the frequency characteristic of the amplifier or the frequency distribution of the noise.However, it can be shown that the noise current contribution i NA plays an important role through the impedance of the sensor.It will be necessary to pay attention to the noise current generated by the amplifier and the output impedance of the sensor R E .

Conditioning circuit improvement
The structure presented on Fig. 6 the technique called chopper [12].This is commonly used because it eliminates the offset of an amplifier and these aberrations that are somehow comparable to a very noise low frequency.At the beginning of system, the V CAPT signal from the sensor is modulated by an alternative clock signal of 1 or −1 in a first mixer.Therefore, the input of the amplifier A 1 , sees the VCAPT sensor signal during the period of the mixer clock.So, it results the Eqs.( 20) and (21).
i-DUST 2016 The output of the amplifier, the signal V A1S and offset added by the amplifier are magnified by a factor k v as shown in the expressions ( 22) and ( 23): The output of the amplifier, the signal is demodulated by a second mixer.The result is a voltage composed of the useful signal affected by a positive offset and a negative offset.
In the end of this system, a low-pass filter completes the process and permits an offset reduction by providing the assessment of the average value of the signal.Assuming that the clock is perfectly symmetrical this average is given in (26).
This technique is also applied to reduce the impact of noise at low frequency in CMOS technology [13].The modulation can be viewed as a way to move the spectral content of the useful signal to a frequency band in which the amplifier generates less noise.After amplification, the second frequency conversion, replace the useful signal to its original band and shifts the low frequency amplifier noise outside the useful band.This one is removed at the end of string by the low-pass filter.

Results and analyses
The Fig. 7 shows the signal to noise ratio versus power consumption and Fig. 8 illustrates the DC bias current in the amplifier versus de biasing voltage.These results are given for measured and simulated with CADENCE Virtuoso simulator with a 0.65 m CMOS standard process.It validates the noise modeling of our amplifier.The TT, SF, FF, SS models are typical, slow-fast, fast-fast and slow-slow corners variations of the CMOS process.The noise and bias current are well determinate and validated by measurements.The simulations suit to measurements.In contrast, the noise added by the amplifier is more significant.To determine the most favorable topology, the impact of noise contributors in the voltage topology was studied.The Fig. 9 presents a die photo of an all integrated conditioning  circuit for MEMS sensors.This circuit was realized in a 0.65 m standard CMOS and the die area is approximately 1mm 2 .

Conclusions
In this paper we have demonstrated a model of noise inside a conditioning circuit dedicated to nano scale sensors.It appears in this study an optimum bias current to achieve the desired performance and a significant constraint on the noise added by the conditioning circuit.Indeed, it appeared to the court of the study from the constraints of conditioning circuit as the noise added by circuits around the sensor is a major constraint.Only too sensitive to common mode topologies have been excluded due to the excess of sensibility.In order to make a choice in relation to the requirements of the application a brief study of the impact of noise contributors present in amplifiers was conducted for the voltage topologies and power topologies.Some additional measurements need to be involved with the LSBB partnership.The campaign might determinate the correct noise floor of our system and great measurement results without any external and additional noises.

E3SFigure 1 .
Figure 1.Noise density at the amplifier input versus EIN.

Figure 3 .
Figure 3. Noise sources contribution in the instrument amplifier.

Figure 7 .
Figure 7. SNR of the amplifier versus power consumption.

E3SFigure 8 .
Figure 8. DC bias current of the amplifier versus BIAS voltage.