Power Distribution Design of MicroSat Power Control Unit Elegant Bread Board (EBB)

The Power Control Unit (PCU) in Micro-satellites program proposed to develop by NSPO, acts as the satellite power control and distribution center. One of the modules in the PCU, named the Power Distribution (PD), the main function provides the rated voltage and current of each power outlet for the satellite subsystem. When overload or short-circuit happens and persists for a time period, PD will limit the load current in a pre-designed value, and shut off the load to avoid damage on essential devices. In this paper, we will introduce the PCU EBB function and circuit design of PD.


Introduction
"Microsat" is usually applied to the name of an artificial satellite with a wet mass between 10 and 100 kg (22 and 220 lb).[1] However, this is not an official convention and sometimes those terms can refer to satellites larger than that, or smaller than that (e.g., 1-50 kg (2.2-110.2lb)).
MicroSats can be built smaller than regulator satellites to reduce the large economic cost of launch vehicles and the costs associated with construction.Miniature satellites, especially in large numbers, may be more useful than fewer, larger ones for some purposesfor example, gathering of scientific data and radio relay.Technical challenges in the construction of MicroSats may include the lack of sufficient power storage or of room for a propulsion system.
Aimed at building a sustainable space industry, National Space Organization (NSPO) proposes to develop Micro-satellites program.The major goal for this program is to cooperate with domestic academia and industry developing the space components, subsystems, system, and forming space.This paper will focus on Power Control Unit architecture description for MicroSat satellite and the Power Distribution circuit design in the PCU Elegant Breadboard (EBB).

Power control unit
The Power Control Unit (PCU) in MicroSat is similar to a human heart.PCU is in charge of receiving solar power from solar arrays and regulating battery charging current according to On Board Computer (OBC) commands.It also controls and distributes power to various satellite load users upon the request of OBC command.A PCU block diagram is shown in Fig. 1. g g  • Activation of propulsion equipment upon OBC command • Hardware protection of spacecraft main bus power under-voltage and preserve recovery capability • Manage OBC main processor initialization and failure detection, recovery • Provision of status monitoring and tele-command interfaces allowing the system and ground operate the power system, evaluate its performance and initiate appropriate countermeasures in case of abnormal conditions

Power distribution module
The Power Distribution (PD) in the PCU EBB provides the rated (MainBus) voltage and current of each power outlet for the satellite unit.MainBus voltage is the tie point for power from the solar arrays and the Battery [2].Each power outlet for the satellite unit is controlled by power switches.The PDM contains 66x power switches of which 58 power outlets are available.For each power outlet, the power switches are implemented with power MOSFETs, and executed ON/OFF control by the FPGAs [3].

Architecture
According to sub-system requirements, The PD is separated from several outlet architectures.Some power outlets only have one switch; some outlets are configured in series for loads or with parallel outputs for special units.Architecture of Power Distribution module is shown in Figure 2.

Circuit design
Whatever the sub-system voltage and load current requirements are, The PD outlets have the same functionality and similar circuit design, as shown in Figure3.Each power outlet both includes a power switch control circuit, current sensing circuit, the transistor feedback circuit, over current detector and current monitor.For convenient design, there are three level outlets in PDM.

Power switch control circuit
In PD module system, power switch control circuit is designed to on/off control the power output to the load.This circuit is controlled by FPGA to turn on/off the power MOSFET switch.In order to meet the requirements, the choosing of the power MOSFET should consider the characteristics of absolute maximum voltage and drain current rating, as well as on/off response time, and rise/falling time.Its design circuit is shown in Figure 4. Without redundancy design in PCU EBB, when an over current occurred by OBC / S-band receiver, the protection process will power cycle OBC / S-band receiver by using a one-shot output which provide one second pulse to turn off and on again OBC / S-band receiver.
The one-shot output circuit is implemented with a mono-stable multi-vibrator featuring both positive and negative edge trigger inputs which can be used an inhibit input Complementary output pulse is provided.
There are three trigger inputs from the device.Inputs (A) are active-low trigger transition inputs and input (B) is an active-high transition Schmitt-trigger input.For OBC / S-band receiver protection, inputs (A) are fit in with our purpose to power cycle load.The basic output pulse width is determined by selection of an internal resistor R INT or an external resistor (R X ) and capacitor (C X ).Once triggered the output pulse width is independent of further transitions of the inputs and is a function of the timing components.Pulse width can vary from a few Nano-seconds to 28 seconds by choosing appropriate R X and C X combinations.

Fig. 6.three trigger inputs
The pulse width is essentially determined by external timing components R X and C X.For C X >1000 pF the output is defined as: Power cycle OBC / S-band receiver with one second pulse, RX is chose 300k ohm, CX is chose 4.7uF.Current sensing circuit is designed to catch load current value that provides for over current and current value evaluating.A high voltage current shunt monitor IC is chosen to achieve this purpose.

Current sensing circuit
The current shunt monitor IC measures a small differential input voltage generated by a load current flowing through an external shunt resistor.The operational amplifier (A 1 ) is connected across the shunt resistor (R SHUNT ) with its inverting input connected to the MainBus side, and the non-inverting input connected to the load side of the satellite unit.Amplifier A 1 responds load current by causing Transistor Q 1 to conduct the necessary current through Resistor R 1 to equalize the potential at both the inverting and non-inverting inputs of Amplifier A 1 .The current through the emitter of Transistor Q 1 (I OUT ) is proportional to the input voltage (V SENSE ), and, therefore, the load current (I LOAD ) through the shunt resistor (R SHUNT ).The output current (I OUT ) is converted to a voltage (V TRANSFER ) by using an external output resistor, the value of which is dependent on the input to output gain equation desired in sub-system requirements.
The transfer function of the current shunt monitor IC is V TRANSFER = I OUT R OUT (4) V TRANSFER = (V SENSE R OUT )/1000 (5) Where: gm = 1000 μA/V

Transistor feedback circuit
As overload or short-circuit takes place, the LCL [4] limits load current in a greatest acceptable value with trip-off time.LCL function is implemented with a simple Transistor feedback circuit.The BJT transistor is used to control the gate length of power MOSFET according to the V TRANSFER magnitude.As the load current increases rapidly, V TRANSFER is proportional immediately.Therefore, BJT transistor starts to decrease the gate voltage (length) of power MOSFET that reduces the load current, also means V TRANSFER decreases.Finally BJT transistor maintains a control balance to power MOSFET; the feedback circle forms a limitation to the load current in a latching value.In order to get different LCL types, resistor R 1 and R 2 value can be adjusted by requirement.

Current monitor
Current monitor circuit can provide user to read load current value.The realizable method is using an OP amplifier that amplify V TRANSFER for corresponding current value.Each load has a max allowed current, current monitor output should within A/D converter max scale to avoid not appear desired current value.
In order to save PCB area, the same level outlets can share the current monitor by using an analog multiplexer.FPGA switches multiplexer to output every channel's current value to A/D converter.In Current Sensing Circuit, load current is transformed to V TRANSFER that can be compared in the Over Current detector.As V TRANSFER is higher than V REF which means the load current is higher than the limit, Trip-off Load, the comparator [5] will output an over-current flag immediately to FPGA.The Schmitt trigger circuit also provides the Hysteresis [6] function to avoid error trigger by noise interference.

Measurement
A circuit evaluated board is designed to verify PD outlet function.This evaluated board includes power switch control circuit, current sensing circuit, transistor feedback circuit, over current detector and current monitor.
For functional testing, an electronic load is used to simulate a real satellite equipment load.Electronic load, Agilent N3300A (mainframe) and N3305A (500W E-Load module), can be set to sink arbitrary current from PD as desired.
According to each equipment power demands in satellite, PD outlet could be designed for different specifications, as showed in Table I.Chose Class C LCL be an example of testing.If overload or short-circuit happens, the LCL protection function will be trigged.For class C, the trip off time is 5ms r 5% and LCL is set to 2.73 Ar 20%.
Sent 3.3V TTL command to switch control circuit, power MOSFET can be switched and main bus voltage measured at outlet output.By using the electronic load to sink 3.0A from outlet, current sensing circuit transferred current to voltage, V TRANSFER that received by BJT feedback circuit.The LCL protected load current to keep current at 2.73A instantly as showed in Figure 8.At the same time, over current detector produced a flag which will be count by housekeeping interface (HKIF)'s FPGA in PCU EBB for Trip-off time countdown.After 5ms r 5%, the FPGA can turns off the switch to terminate load current output.For current monitor test, using the electronic load to sink output and record the respond value of current monitor.These results of current monitor are linear, as table II shows.For PCU EBB, transmitting these analog data to a 12 bit A/D converter which can output digital hex data to HKIF's FPGA.According to Engineering Translation factor which wrote in Fly software, the current value can appear on display page.

Conclusions
We present the PCU architecture description for Micro-Satellite and the PD circuit design in the PCU Elegant Breadboard (EBB) in this study.In order to verify the circuit design, an evaluated board was manufactured to provide measurement and fine-tuning for PD_EBB.According to evaluated board testing result, PD_EBB design has finished the circuit design, PCB fabrication is ongoing and functional checkout will execute sequentially.
PCU_EBB will be the first step for MicroSat mission, the follow-on PCU development will be engineer model (EM), Engineering Qualification Model (EQM) which will execute the Electromagnetic Interference (EMI) analysis, Thermal-Vacuum Testing, and vebration testing.
Through above Environmental testing, the PCU will continue to step in Fight Model (FM) which is real using in the MicroSat mission.

Fig. 1 .
Fig. 1.Function Diagram of Power Control Unit The PCU consists of 5 main functions, i.e.Power Distribution, Battery Charge Regulation, DC-DC Conversion, Power Relay, and Housekeeping Interface.Their main functions are as following: • Convert input solar power to spacecraft required power by means of executing pulse width modulation switching commands received from OBC • Provide Battery over voltage hardware protection • Distribution of unregulated primary electrical power via over-current protected outlets to bus and instrument units as well as electrical heaters upon OBC command • Distribution of thermostatic-control heater Activation of solar array Hold Down& Release Mechanism (HDRM) upon OBC command

Fig. 5 .
Fig. 5.one-shot output circuitAn internal timing resistor is provided for design convenience minimizing component count and lay-out problems.This device can be used with a single external capacitorThe basic output pulse width is determined by selection of an internal resistor R INT or an external resistor (R X ) and capacitor (C X ).Once triggered the output pulse width is independent of further transitions of the inputs and is a function of the timing components.Pulse width can vary from a few Nano-seconds to 28 seconds by choosing appropriate R X and C X combinations.

Table 2 .
List of Outlet Types