Design of Electromagnetic Wave Resistivity Measurement System for Underground Coal Mine

: In this paper, the measurement system of electromagnetic wave resistivity logging tool for underground coal mine is designed, which is based on DSP and FPGA. The detection of amplitude ratio and phase difference of weak signal is realized, and its performance index meets the design requirements and actual needs.


Introduction
Well logging technology has been widely used in the whole process of exploration and development of oil-gas fields and coal fields providing important data for geologists. Although there are many kinds of logging methods, at present only natural gamma logging is used in drilling construction of underground coal mine. For geological guidance, only gamma is not enough, so it is urgent to introduce other logging methods into the field of underground coal mine drilling. Electromagnetic wave resistivity logging is an important method in oil logging. It uses the propagation effect of electromagnetic wave in the medium to measure the relative changes of two characteristic parameters (phase difference and amplitude ratio) of electromagnetic field to obtain the resistivity of stratum, so as to evaluate the stratum and geological characteristics. In recent years, with the rapid development of electromagnetic wave resistivity logging and its related technologies, it has been widely used in oil drilling engineering and reservoir evaluation. However, due to the particularity of coal mines, petroleum instruments cannot be directly used for the underground coal mine. In this paper, a measurement system of electromagnetic wave resistivity logging tool for underground coal mine is designed.

Principle
The theoretical basis of electromagnetic logging-whiledrilling is the propagation effect of electromagnetic wave. Due to different geological parameters in different strata, the response to medium-and high-frequency electromagnetic field is different. When a logging tool transmits electromagnetic wave through a transmitting antenna, due to the different of stratum resistivity, its attenuation and phase variation are different. Therefore, by measuring the phase difference and amplitude attenuation of the electromagnetic wave with the receiving antenna, the original resistivity of the stratum can be inverted. In the actual electromagnetic wave logging, two or more receiving antennas are generally arranged, and the resistivity of the stratum is obtained by inversion of the amplitude ratio and phase difference of the electromotive force detected by these receiving antennas [1][2][3].
The system adopts the structure of dual transmitter and dual receiver antenna, and its work flow is shown in Figure 1. Two transmit antennas transmit electromagnetic wave signals of 2MHz and 400kHz alternately, and take them as a work cycle to complete one transmission alternately. In the transmission process of each transmitting antenna, the two receiving antennas simultaneously collect the electromagnetic wave signal transmitted by the stratum, and then obtain the amplitude ratio and phase difference through signal conditioning and digital signal processing. Four groups of amplitude ratio and phase difference measured in a working cycle are inversely performed to four resistivity values, and the system completes one measurement. After repeated measurements, four resistivity curves can be obtained to reflect the physical characteristics of the formation. The block diagram of the logging tool system is shown in Figure 2. The system adopts two core processors, i.e. one DSP and one FPGA. DSP and FPGA cooperate to complete high-precision acquisition of analog signal, fast Fourier transform processing of digital signal, digital filtering processing and data communication. Other modules include: high frequency signal generator, multichannel distribution and power amplifier circuit, receiving signal pre-amplifier circuit, receiving signal processing circuit, power supply circuit and communication circuit.

Transmitting circuit
The electromagnetic wave transmitting module is composed of high frequency signal generator, multichannel distributor, power driving circuit and transmitting coil, as shown in Figure 3. The 400k and 2MHz high frequency signals are generated by DDS chip, and the DDS chip selects AD9833. The output signal frequency and phase are controlled by DSP programming. The output of AD9833 is filtered by passive filter network, and then amplifying power to drive the resonant coil. In order to improve the efficiency of the power amplifier, class D power amplifier is used here. Theoretically, the efficiency of class D power amplifier can reach more than 80%, which can reduce the power loss and the heating of the device, ensure the life of the device and improve the stability of the system. The design block diagram of the power amplifier is shown in Figure 4.

Half-bridge Driver
MOSFET Low-pass Filter

Receiving circuit
Due to the high frequency of the received signal (2MHz and 400kHz), direct digitization requires high speed and accuracy of the A/D converter, and the received signal is very weak, the signal amplitude is in the order of NV, so it cannot be processed directly. By using low noise amplifier as the pre-amplifier, the electronic circuit noise is suppressed to ensure the signal-to-noise ratio. In the phase of digital signal acquisition, frequency mixing technology is used to reduce the frequency of the received signal, so as to ensure the undistorted sampling of highfrequency electromagnetic signal. At the same time, by optimizing the sampling time and increasing the signal superposition, the signal-to-noise ratio is further improved. The receiving circuit block diagram is shown in Figure 5. The signal processing system is mainly based on FPGA and DSP to acquire and process the front analog signal, so as to achieve the measurement of resistivity parameters (phase difference and amplitude ratio).
The whole signal processing structure mainly includes data acquisition module, FPGA processing unit and DSP processing unit.
The data acquisition module is mainly under the control of FPGA to achieve the acquisition of the front analog signal. The ADC selected in this design is ad9269 of ADI company. Ad9269 is a dual channel, 16 bit, 20/40/65/80 MSPs analog-to-digital converter. It features a high-performance sample-and-hold circuit and on-chip voltage reference. It uses multistage differential pipeline architecture with output error correction logic to provide 16-bit accuracy at 80 MSPS data rates.
FPGA processing unit mainly stores the collected data (FIFO), and sends the data information to DSP for processing, and communicates with RS485 serial port transceiver module. Here, FPGA programmable logic device selects xc6slx9-2cpg196c produced by Xilinx company. The chip has rich hardware logic resources, including 9152 logic units and 11440 triggers, which can realize multiple functions complex signal processing algorithms such as parallel data processing and fast Fourier transform. DSP processing unit mainly deals with a series of algorithms for the data transmitted by FPGA, including data storage, FFT, modular operation, peak search, phase acquisition, peak value acquisition, phase difference calculation, peak ratio calculation and serial port transmission. In this design, tms320c6727b of TI company is adopted, with the maximum clock frequency of 250MHz. Eight instructions can be executed in parallel per clock cycle (six of them are floating-point instructions), with the maximum performance of 2800 MIPS / 2100 MFLOPS. It supports 32-bit fixed-point, 32-bit single precision floating-point and 64-bit double precision floating-point operations.
In this design, DSP has great advantages in digital signal processing, so the algorithm processing is implemented in DSP, and the specific processing flow chart is shown in Figure 7.

Conclusion
Under the condition of hardware connection and software implementation described in this paper, the system can generate stable and high-precision 2MHz and 400kHz signals, and realize high-precision measurement of phase difference and amplitude ratio of weak signals. The hardware connection is simple and the software implementation is reliable. Its performance index meets the design requirements and actual needs. [1] Major National Science and Technology Special Tasks in the 13th Five-Year Plan (2016ZX05045-003-001).