Comparison of Control Techniques & Modeling of 15-level cross H Bridge Multilevel Inverter

A bstract This paper presents the simulation of a 15-level cross-H bridge multilevel inverter using control techniques like sinusoidal pulse width modulation and third harmonic injection pulse width modulation. This paper aims to enhance output voltage level using fewer switches and to decrease total harmonic distortion by improving overall efficiency. Compared to other inverter topologies cross H bridge topology uses a lesser number of switches and dc voltages. Analysis and simulation of 15-level cross H bridge MLI are performed and presented

Conduction angle fm Modulating wave's peak frequency

Introduction
These days, MLI has acquired enormous consideration and has gotten more promoted in high/medium voltage and force applications with lower consonant substance and higher proficiency. MLI's are comprehensively utilized in energy area businesses for receptive force remuneration and drive control. The diverse customary geographies of staggered inverters are Neutral Point Clamped (NPC), Flying Capacitor (FC), and cascade H-Bridge inverters (CHB) [2][3][4][5]. In these natural features, cascade H bridge topology is broadly utilized due to its straightforward design, outrageous particularity, and no voltage balance issues. The principle disadvantage of this topology is the requirement for more force electronic segments with an increment in the quantity of levels which significantly expands cost, exchanging misfortunes, and diminishes the proficiency of the framework. To defeat these downsides, we are going with cross H bridge topology [1,10,11] which is more worthwhile over fell MLI as far as sounds in yield voltage and the quantity of switches. Along these lines, the expense is limited, and effectiveness is improved. The diverse control methods utilized in this paper are sinusoidal pulse width regulation (SPWM) [7,8] and third harmonic injection pulse width modulation (THI-PWM) [6,7]. Here, a 15-level inverter is examined principally and can be stretched out to quite a few levels. This topology consists of sixteen switches and seven DC voltage sources for a 1-ϕ, 15-level cross-H bridge inverter. Figure (1) shows a block diagram of a 15-level cross H bridge multilevel inverter [1,10,11] (MLI) fed with any load. In this paper, we have used resistive load and induction motor loads respectively. Figure (3) shows a single-phase 15-level cross H bridge inverter, whose switches and DC voltage sources are cross-connected and with suitable switching, the desired output voltage is generated. Figure (2) shows a three-phase 15-level cross H bridge inverter. The THD is improved using this topology compared to other topologies. Total fifteen output voltage levels -7Vdc, -6Vdc, -5Vdc, -4Vdc, -3Vdc, -2Vdc, -Vdc, 0, Vdc, 2Vdc, 3Vdc, 4Vdc, 5Vdc, 6Vdc, 7Vdc are generated. Also, the odd-numbered switches operate in a complementary manner to the even-numbered switches. The switching pattern of the proposed topology is shown in Table (1) for figure (3). The proposed topology is conventional and can be extended to any MLI by using the following formulae. In this topology, we have obtained generalized formulae for the number of levels and the total number of switches required is Nl = 2Vndc+1 (1) Sn = 2(Vndc+1)

Mathematical Formulae
The output voltage [1] of the multilevel inverter (MLI) can be computed from the Fourier series as shown below (4) Through the x-axis, there is the existence of quarter-wave symmetry. So, the coefficients and become zero. Assume the symmetry across the y axis at ω = π /6, and is defined as (5) After successive calculations the output voltage equation obtained as below (6) Exchanging points of MLI are accomplished by procuring nonlinear conditions from the specific harmonic elimination measure. From this technique, we can wipe out any chosen harmonic from the waveform. For 15 level, MLI with fifth, seventh, eleventh, thirteenth, seventeenth, and nineteenth harmonic disposal the accompanying conditions can be defined. The mathematical equations obtained to compute conduction angles are From the above equation (7), the number seven indicates the magnitude of the Fourier series fundamental component which is at the right side of the first equation, and 'm' implies modulation index. By iterating repeatedly with Newton Raphson (NR) [1] method conduction angles can be obtained. Those conduction angles are shown below (8) Also, the formula for total harmonic distortion (THD) is shown below (9)

Sinusoidal pulse width modulation technique (SPWM)
The sinusoidal pulse width modulation technique [7,8] is a simple modulation technique used for harmonic reduction in inverters. In this technique, the pulse magnitude will be constant, and the pulse width is changed. Here, a reference wave is compared with a carrier wave and generates gate pulses. For this, a pure sine wave (reference) is compared with a triangular wave (carrier). The fundamental frequency is taken for the sine wave, and more than the fundamental frequency can be taken for the carrier wave. If the number of levels is N then (N-1) triangular carrier waves are required. So, a fifteen-level inverter requires fourteen carrier waves as shown in figure (4). Two important parameters are defined in modulation techniques: 1. The frequency ratio mf= fcr/fm 2. The amplitude modulation index is given below: ma=Vm/(Vcr(m-1))

Fig. 4. Sinusoidal pulse width modulation for 15-level MLI
The fundamental frequency component in the inverter output voltage can be controlled by the amplitude modulation index. Where 'fm' is the modulating wave's peak frequency, 'fcr' is the carrier wave's peak frequency, 'Vm' is the reference signal peak amplitude and 'Vcr' is carrier signal peak amplitude respectively. The amplitude modulation index 'ma' is usually adjusted by varying 'Vm' and keeping 'Vcr' fixed. The frequency of the reference signal determines inverter output frequency and its peak amplitude controls modulation index and in turn RMS output voltage. The SPWM scheme used here is level shifted in phase disposition (IPD) as it has a lower harmonic profile compared to other conventional techniques. Figure (4) shows level-shifted in-phase disposition sinusoidal pulse width modulation for a fifteen-level cross H-bridge inverter. The results can be seen in Table (3), and the fundamental three-phase output voltage can be seen in figure (7).

Third harmonic injection pulse width modulation technique (THI-PWM)
The sinusoidal pulse width modulation strategy is not difficult to carry out just as to comprehend. Yet, the principle downside of this technique is, it can't use the whole accessible DC bus supply voltage and subsequently this strategy approaches less of the greatest achievable output voltage. Along these lines, a third harmonic pulse width modulation technique [7] is acquainted with defeat this issue. In this technique, by adding a third harmonic signal in a low-frequency sinusoidal reference signal we can accomplish the abundancy expansion in output voltage waveform. The expansion of third harmonics implies that in one cycle of a sinusoidal wave, three patterns of harmonics will finish. The consequence of the addition of the third harmonic and fundamental harmonic is less in amplitude than the fundamental harmonic.

Fig. 6. Third harmonic injection pulse width modulation(THI-PWM)on 15-level cross H bridge inverter
This method helps the inverter in its performance enhancement. Figure (5) shows the third harmonic injection technique. In this paper, a basic third harmonic injection pulse width modulation is carried out for a fifteen-level inverter and the results can be seen in Table (3), and the fundamental output voltage can be seen in figure (13). Whereas figure (6) shows the third harmonic injection pulse width modulation (THI-PWM) on a 15-level cross H bridge inverter, where the third harmonic injected component with fourteen carrier waves are compared together to generate the gate pulses.

Simulation results
The simulations of cross H bridge multi-level inverter (MLI) are performed in MATLAB/SIMULINK domain. The schematic diagram of the presented topology can be seen from figure (1). Switching sequences are shown in table (1). The parameters used for simulation are listed in table (2).  (7), (11) show fundamental three-phase output voltages for 15-level cross H bridge inverter and total harmonic distortion (THD) of R-Load.

Comparison of SPWM and THI-PWM techniques
Here the obtained results from SPWM and THI-PWM techniques for 15-level cross H bridge topology are compared [10][11][12][13][14][15]. Four factors are taken into consideration for the comparison of induction motor load and two factors are considered for comparison of Rload. The factors that are considered for induction motor load are output fundamental L-L voltage magnitude, THD, speed, and torque characteristics respectively. The factors that are considered for R-load are output fundamental L-L voltage and THD respectively.

Conclusion
In this paper control techniques like SPWM & THI-PWM are discussed and compared. From these techniques, we can conclude that THI-PWM is best suited compared to the SPWM technique in terms of voltage magnitude, THD, speed, and torque for induction motor load, whereas voltage magnitude and THD factors in the case of R-load. Also in this paper, we used a topology that uses less power electronic switches, the number of voltage sources compared to any other typical MLI topologies. Also, this cross-H bridge topology has low cost, switching losses, and high efficiency. 'N+1' switches are required for 'N' level inverter in cross H bridge topology.