Issue |
E3S Web Conf.
Volume 376, 2023
International Scientific and Practical Conference “Environmental Risks and Safety in Mechanical Engineering” (ERSME-2023)
|
|
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Article Number | 01090 | |
Number of page(s) | 10 | |
Section | I Environmental Risks and Safety in Mechanical Engineering | |
DOI | https://doi.org/10.1051/e3sconf/202337601090 | |
Published online | 31 March 2023 |
Verification methods for complex-functional blocks in CAD for chips deep submicron design standards
1 Moscow Aviation Institute (National Research University), 4, Volokolamskoe shosse 125993, Moscow, Russia
2 Voronezh State Technical University, 20-letiya Oktyabrya Street, 84, 394006, Voronezh, Russia
3 Moscow State University of Civil Engineering, 129337, Yaroslavskoe shosse, 26, Moscow, Russia
* Corresponding author: wkz@rambler.ru
The article discusses the design stages of very large-scale integrated circuits (VLSI) and the features of the procedure for verifying complex-functional VLSI blocks. The main approaches to microcircuit verification procedures are analyzed to minimize the duration of verification cycles. In practice, a combination of several approaches to verification is usually used.
© The Authors, published by EDP Sciences, 2023
This is an Open Access article distributed under the terms of the Creative Commons Attribution License 4.0, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.
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