Article references

Articles citing this article

The Citing articles tool gives a list of articles citing the current article.
The citing articles come from EDP Sciences database, as well as other publishers participating in CrossRef Cited-by Linking Program. You can set up your personal account to receive an email alert each time this article is cited by a new article (see the menu on the right-hand side of the abstract page).

Cited article:

Design of Wallace tree multiplier circuit using high performance and low power full adder

S. Naga Leela, Boppa Manisha, Palle Bharath, Erram Praneeth

E3S Web Conf., 391 (2023) 01025

Published online: 2023-06-05

DOI: https://doi.org/10.1051/e3sconf/202339101025

This article has been cited by the following article(s):

Srividya B V, Manasi V Varma, Nidhi Mukesh, Ishwarya S and Kavita S
204 (2025)
https://doi.org/10.1109/ICTMIM65579.2025.10988010

Md. Khairul Islam, Kayes Hasan, Nigar Sultana and Muhibul Haque Bhuyan
1 (2025)
https://doi.org/10.1109/ECCE64574.2025.11013073

S. Naga Leela, Dorsela Keerthi Chandrika, Kasireddy Swetha, Dhanush Goud Kalali and G. Shanthi
1 (2024)
https://doi.org/10.1109/INOCON60754.2024.10512237

Tejaswi Chetamoni, Mothe Rishi and Manoj Kumar
1 (2024)
https://doi.org/10.1109/ICCCNT61001.2024.10724175

A low power design using FinFET-based 2N-N-2P adiabatic logic based 4×4 and 8×8 Reduced Complexity Wallace Tree Multiplier

S. Dhanalakshmi and C. Gowri Shankar
International Journal of Electronics 1 (2024)
https://doi.org/10.1080/00207217.2024.2440917

Design and implementation of wallace tree multiplier and its applications in FIR filter

R. Archana and A. Nallathambi
i-manager's Journal on Circuits and Systems 12 (1) 36 (2024)
https://doi.org/10.26634/jcir.12.1.21064