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Cited article:

Design of Wallace tree multiplier circuit using high performance and low power full adder

S. Naga Leela, Boppa Manisha, Palle Bharath, Erram Praneeth

E3S Web Conf., 391 (2023) 01025

Published online: 2023-06-05

DOI: https://doi.org/10.1051/e3sconf/202339101025

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