Design and real-time implementation of novel reduced-switch 7-level multilevel inverter

Dept. of EEE, Dr. Ambedkar Institute of Technology, Bengaluru, India

^* Corresponding author: This email address is being protected from spambots. You need JavaScript enabled to view it.

Abstract

This paper presents the design, simulation, and experimental validation of a high-efficiency, reduced-switch seven-level multilevel inverter (MLI) utilizing an Arduino-based control strategy. While traditional multilevel topologies—such as the Cascaded H-Bridge (CHB)—offer superior power quality, they are often constrained by high component counts, increased switching losses, and complex gate-drive requirements. The proposed topology addresses these limitations by employing a strategic configuration of only eight power switches and a single DC source integrated with a capacitive voltage divider network. This optimized structure significantly reduces the semiconductor footprint and simplifies the auxiliary circuitry required for level generation.The system performance was initially evaluated through MATLAB/Simulink to analyze the total harmonic distortion (THD) and switching transitions. Subsequently, a hardware prototype was implemented using IRF540N MOSFETs, TLP250 opto-isolated gate drivers, and an Arduino UNO for pulse-width modulation (PWM) execution. Experimental results demonstrate the successful generation of a seven-level stepped waveform with a measured THD of 8–10%, aligning closely with simulation data. The findings conclude that the proposed inverter offers a robust, cost-effective, and compact solution for low-frequency AC applications, renewable energy integration, and small-scale industrial drives.