| Issue |
E3S Web Conf.
Volume 430, 2023
15th International Conference on Materials Processing and Characterization (ICMPC 2023)
|
|
|---|---|---|
| Article Number | 01012 | |
| Number of page(s) | 10 | |
| DOI | https://doi.org/10.1051/e3sconf/202343001012 | |
| Published online | 06 October 2023 | |
Implementation of three stage comparator using a modified latch with sustainable resources
1 GRIET, ECE Department, Hyderabad, India, gallanavya113@gmail.com
2 Uttaranchal Institute of Technology, Uttaranchal University, India, jitendragupta@uumail.in
3 KG Reddy College of Engineering & Technology, India, vandana.rao20@gmail.com
* Corresponding author: kjamal24@gmail.com
In this paper, the current study uses a lector technique to modify the latch. The Lector approach is one of the top low-power methods for IC technologies. The locking mechanism is the third stage in our proposed design for a three-stage comparator. The lector approach is used for the three-stage comparator circuit in this case and its modified version. Pre-amplifier stages are the first two levels. The improved performance of this comparator circuit uses two sets of complementary biased two-stage preamplifiers. The traditional three-stage amplifier decreased the latency, while the modified version of the modified three-stage amplifier focused on the kickback noise. The proposed design of this three-stage comparator, which employs a lector approach, concentrates mainly on lower consumption. Tanner EDA was used to build and simulate this complete schematic. Materials having a lesser environmental effect are chosen, such as those that use fewer resources or are simpler to recycle after a product’s lifespan and sustainability.
© The Authors, published by EDP Sciences, 2023
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