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All issues Volume 399 (2023) E3S Web Conf., 399 (2023) 01009 References
Open Access
Issue
E3S Web Conf.
Volume 399, 2023
International Conference on Newer Engineering Concepts and Technology (ICONNECT-2023)
Article Number 01009
Number of page(s) 9
Section Electronics and Electical Engineering
DOI https://doi.org/10.1051/e3sconf/202339901009
Published online 12 July 2023
  1. CNN Inference Using a Preprocessing Precision Controller and Approximate Multipliers With Various Precisions, Received December 10, 2020, accepted December 28, 2020, date of publication January 5, 2021, date of current version January 13, 2021. [Google Scholar]
  2. A Low-Power and High-Accuracy Approximate Multiplier With Reconfigurable Truncation, Fang-Yi Gu; Ing-Chao Lin; Jia-Wei Lin Date of Publication: 30 May 2022, Publishedin: IEEE Access (Volume:10), DOI: 10.1109/ACCESS.2022.3179112 [Google Scholar]
  3. Approximate Multiplier Design Using Novel Dual-Stage4:2Compressors, Pranose J. Edavoor, Sithara Raveendran, and Amo Ld. Rahulkar, This work was supported by the Science and Engineering Research Board(SERB), Department of Science and Technology, Government of India, under Grant ECR/2016/001352. [Google Scholar]
  4. Variable Precision Multiplier and Accumulator Unit for Digital Filter Applications, Neelima, K., Satyam, that was published in the year 2022 by IEEE International Conference on Distributed Computing, VLSI, Electrical Circuits and Robotics(DISCOVER). [Google Scholar]
  5. Performance Analysis of Paralle lFIR Digital Filter Based on Even Symmetric Fast FIR Algorithm using Different Adders, S. Narendran, BT Geetha, that was published in the year 2021 by5th International Conference on Electronics, Communication and Aerospace Technology(ICECA). [Google Scholar]
  6. Are configurable Approximate Multiplier for Quantized CNN Applications, Chuliang Guo, Li Zhang, Xian Zhou, Weikang Qian, Cheng Zhuo That was published in the year 2020 by 25th Asia and South Pacific Design Automation Conference(ASP- DAC). [Google Scholar]
  7. ModifiedHighSpeed32- bitVedicMultiplierDesignandImplementation, M. BalaMurugesh; S. Nagaraj; J. Jayasree; G. Vijay Kumar Reddy that was published in the year 2020 by International Conference on Electronics and Sustainable Communication Systems(ICESC). [Google Scholar]
  8. A review paper on different multipliers based on their different performance parameters; Binta Lamba, Anurag Sharma that was published in the year 2018 by 2nd International Conference on Inventive Systems and Control(ICISC). [Google Scholar]
  9. Low-Complexity VLSI Design of Large Integer Multipliers for Fully Homomorphic Encryption that was published in the year 2018 by IEEE Transactions on Very Large Scale Integration (VLSI) Systems (Volume: 26, Issue: 9, September 2018) [Google Scholar]
  10. Approximate Multipliers with Dynamic Truncation for Energy Reduction via Graceful Quality Degradation; Fabio Frustaci, Stefania Perri, Pasquale Corsonello, Massimo Alioto was published in 2020 by IEEE Transactions on Circuits and Systems II. [Google Scholar]
  11. An Area and Delay Efficient Logarithmic Multiplie, NavtejaAlla and Syed Ershad Ahmed Department of Electrical Engineering, BITS Pilani, Hyderabad Campus, Hyderabad, Indiasyed@hyderabad.bits-pilani.ac.in, 2020 International Conference on Contemporary Computing and Applications (IC3A) Dr.A.P.J. AbdulKalam Technical University, Lucknow. Feb 05-07, 2020 [Google Scholar]
  12. Senthilkumar K.K., Kumarasamy K., Dhandapani V., (2021), “Approximate Multipliers Using Bio-Inspired Algorithm”, Journal of Electrical Engineering and Technology, Vol. 16, no. 1, pp. 559–568. DOI: 10.1007/s42835-020-00564-w [Google Scholar]
  13. Rajesh G., Raajini X.M., Kritika N., Kavinkumar A., Sagayam K.M., Som M.M., Wahab M.H.A., (2022), “Achieving Longevity in Wireless Body Area Network by Efficient Transmission Power Control for IoMT Applications”, International Journal of Integrated Engineering, Vol. 14, no. 3, pp. 80–89. DOI: 10.30880/ijie.2022.14.03.009 [Google Scholar]
  14. Schmitt trigger based SRAM cell for ultralow power operation-a CNFET based approach [Google Scholar]
  15. Aravind A.R., Senthilkumar K.K., Vijayalakshmi G., Gayathri J., Kalanandhini G., (2022), “Study on modified booth recoder with fused add-multiply operator”, AIP Conference Proceedings, Vol. 2393, no., pp.-. DOI: 10.1063/5.0074212 [Google Scholar]
  16. Prof. Virendra Umale. (2020). Design and Analysis of Low Power Dual Edge Triggered Mechanism Flip-Flop Employing Power Gating Methodology. International Journal of New Practices in Management and Engineering, 6(01), 26–31. [CrossRef] [Google Scholar]
  17. Dr. Bhushan Bandre. (2013). Design and Analysis of Low Power Energy Efficient Braun Multiplier. International Journal of New Practices in Management and Engineering, 2(01), 08–16. [CrossRef] [Google Scholar]
  18. Vijay, J., & Hema, L. K. (2023). Analysis of Solid-State Transformer Enabled Hybrid Microgrid using Resilience Energy Amendment Control Algorithm. International Journal of Intelligent Systems and Applications in Engineering, 11(2), 572–581. [Google Scholar]
  19. Karthikeyan, A., Balaji, S., Santhakumar, R., Rajalakshmi, S., & Jayakrishnan, P. (2022). A Leakage Reduction Charge Pump based Domino Logic for Low Power VLSI Circuits. International Journal of Intelligent Systems and Applications in Engineering, 10(4), 211–215. [Google Scholar]
  20. Eamani, R. R., & Kumar, N. V. (2023). Design and Analysis of Multiplexer based Approximate Adder for Low Power Applications. International Journal on Recent and Innovation Trends in Computing and Communication, 11(3), 228–233. [CrossRef] [Google Scholar]
  21. C. S., S., Kunju, N., & Shahul Hameed, T. A. (2023). Design and Simulation of Two Stage Wideband CMOS Amplifier in 90 NM Technology. International Journal on Recent and Innovation Trends in Computing and Communication, 11(2s), 249–258. [CrossRef] [Google Scholar]

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